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Projects Completed

  • Design of 16-bit processor using VHDL

The processor contains a number of basic pieces. There is a register array of 8 16 bit register, an ALU. A shifter, a program counter, an instruction register, a comparator, an address register and control unit. All of these units communicate through a common 16 bit tri state data base.

  • FPGA implementation of 2-player Pong Game

The project targets the interfacing of PS2 keyboard and VGA IEEE protocols with FPGA and finally using the concept to make a Pong Game as an application.

  • Design of an 8x8 Modified Booth Multiplier

In this project an 8x8 multiplier was designed and simulated at the gate level and at the transistor level. We optimized the multiplier for speed by implementing fundamental building blocks directly in CMOS with the IBM CMRF7SF 0.18um process. Booth's multiplication algorithm was used to reduce the number of partial products, and thus the number of adders, providing a speed advantage.

  • Verilog Implementation of MOVE processor

Based on the Transport Triggered Architecture(TTA)

  •  Pipelined DCTQ processor for video compression algorithm using Verilog
Application is to receive a burst of Image/video data and apply a transform such as the 2-D DCT, combined with quantization and zigzag arrangement, in order to effect compression on a picture.