Mr. Shiv Bhushan
M.Tech in VLSI Design & Embedded Systems - "An Analytical Model for the Threshold Voltage of Short-Channel Double-Material-Gate (DMG) MOSFETs with a Strained-Silicon (s-Si) Channel on Silicon-Germanium (SiGe) Substrates" from National Institute Of Technology, Rourkela 2013. Secured 8.79 (CGPA) marks.
- Five in referred International journals
- Presented papers in 4 International IEEE conferences
- 15 days certificate course in ATLAS 2 D Device Simulator at IIT BHU in 2012.
- 15 days certificate course in Nav-aids, VHF, AMSS at Airport Authority of India, New Delhi in 2008
- Attended FEEL PROGRAMME, Organized by COLLEGE FOR LEADERSHIP AND HRD, MANGLORE in 2006 and 2007.